A4MMC 2011 : 2nd Workshop on Applications for Multi and Many Core Processors

Deadline extension! 

The deadline for A4MMC 2011 has been extended to 16th of April, 23:59:59 CET.


Welcome to the 

2nd Workshop on Applications for Multi and Many Core Processors

held in conjunction with the 38th International Symposium on Computer Architecture (ISCA 2011)


About A4MMC

Multi and many­core processors are here to stay. And this is no longer an academic rumour, but a reality endorsed and enforced by all processor vendors. However, both the academia and the industry agree that although the novel processors may drill through the power and performance walls, they also open up a new and wide programmability gap. As technology advances, the software seems to lag behind more and more. In fact, the multi­core world is witnessing a technology push from the hardware side.

We believe that developing novel hardware, and also software stacks, tools and programming models is going nowhere if the requirements of the applications are not taken into account, or if these platforms are simply too difficult to program (efficiently). It is, after all, a matter of economics: if we don't focus on productivity and efficiency, the software development cost per "performance unit" might become so high that the next generations of multi and many­cores will simply be unsuccessful.

The best way to initiate productivity and efficiency analyses is to collect a large enough pool of representative, variate, real­life applications that make use of multi­/many­core architectures. Hence this workshop, "Applications for Multi and Many Cores Processors" (A4MMC), which focuses entirely on application case studies. With A4MMC, we aim to provide a forum where multi­ and many­core application designers can exchange knowledge, insights and discoveries, and discuss their latest research advances. Further, by collocating A4MMC with ISCA, we aim to directly expose the software community's findings, requirements, and problems to a select audience of top computer architecture
researchers. This workshop provides room for the pull from the software side, and offers an ideal opportunity for software and hardware researchers to communicate and debate on how to find the right balance between these two sides of the "multi­core revolution".

Our final goal is to build a pool of real­life multi­core applications, backed­up by performance studies and potential hardware add­ons. Such a collection will be useful to both the hardware and software developers, and it will be a good starting point for the tools and programming models communities in their work towards more effective models and methods. We strongly believe this is the most efficient way to bridge the multi­core programmability gap in a systematic way.